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- США
- Зарплата
- 138 000 $ – 206 000 $
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Senior Engineer, RTL Memory Centric Computing
Престижная позиция в передовом R&D центре Samsung с конкурентной зарплатой, отличным соцпакетом и возможностью работать над технологиями AGI.
Сложность вакансии
Высокая сложность обусловлена требованиями к глубоким знаниям микроархитектуры, опыта работы с Memory Controllers/NOC и специфики нагрузок AI/ML в исследовательском подразделении.
Анализ зарплаты
Предложенный диапазон $138k–$206k полностью соответствует рыночным стандартам для Senior RTL инженеров в Кремниевой долине, где медиана составляет около $175k без учета бонусов и акций.
Сопроводительное письмо
I am writing to express my strong interest in the Senior Engineer, RTL Memory Centric Computing position at Samsung Semiconductor's AGI Computing Lab. With over five years of experience in RTL development and a deep focus on memory controllers and interconnect IPs, I have consistently delivered high-performance designs that optimize power and area. My background in hardware-software co-design aligns perfectly with your mission to revolutionize AI/ML workloads through innovative memory-centric architectures.
In my previous roles, I have successfully navigated complex design trade-offs across performance, thermal, and cost constraints, utilizing SystemVerilog and HLS to build scalable platforms. I am particularly drawn to Samsung's commitment to AGI and the opportunity to work at the intersection of LLMs and accelerator hardware. I am confident that my technical expertise in microarchitecture and my collaborative approach to solving system-level challenges will make me a valuable asset to your San Jose team.
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Описание вакансии
Please Note:
To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.
Advancing the World’s Technology Together
Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future.
We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.
The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing!
We are looking for a Senior Engineer, RTL Memory Centric Computing.This role is being offered under the AGICL lab as a part of DSRA. We are a research-driven systems lab working at the intersection of large language models, accelerator hardware, and high-performance software stacks. Our mission is to design, prototype, and optimize next-generation AI systems through tight hardware–software co-design.
Location: Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.
What You’ll Do
- Develop IP for memory centric computing systems using Verilog, System Verilog and HLS
- Optimize the IP for performance, power, and area by leveraging advanced design techniques such as pipelining, parallelism, and data compression.
- Collaborate with Verification engineers to design and develop test plans
- Make design decisions out of a large design trade-off space across performance, power, thermal, and cost.
- Troubleshoot and debug hardware issues and ensure the quality of the design through verification and validation.
- Stay up-to-date with the latest advancements in machine learning and hardware architecture and contribute to the development of new technologies.
- Communicate effectively with stakeholders, including users, partners, and management, to ensure that the systems are delivered on time and within budget
- Complete other responsibilities as assigned.
What You Bring
- Bachelor’s with 5+ years, or Master’s with 3+ years, or PhD's with 0+ years of industry experience.
- Strong background in microarchitecture and computer architecture
- 5+ years of experience in front-end design methodology involving RTL development for complex control and data path IPs
- Experience in designing Memory Controller, NOC, Interconnect IP
- Experience in Memory Centric computing IP and SOC integration
- Experience in AI/ML workloads.
- Strong analytical and problem-solving skills
- Excellent communication and interpersonal skills
- Ability to work independently and as part of a team
- You’re inclusive, adapting your style to the situation and diverse global norms of our people.
- An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
- You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
- Innovative and creative, you proactively explore new ideas and adapt quickly to change
#LI-VL1
What We OfferThe pay range below is for all roles at this level across all US locations and functions. Pay within this range varies by work location and may also depend on job-related knowledge, skills, and experience. We also offer incentive opportunities that reward employees based on individual and company performance.
This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours.
Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.
Enjoy Time Away You’ll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.
Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.
Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you’ll have support no matter where you are.
Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.
Embrace Flexibility Benefits are best when you have the space to use them. That’s why we facilitate a flexible environment so you can find the right balance for you.
Base Pay Range
$138,000—$206,000 USD
Equal Opportunity Employment Policy
Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status.
When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations.
Recruiting Agency Policy
We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings.
Applicant AI Use Policy
At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate’s genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process.
Applicant Privacy Policy
https://semiconductor.samsung.com/about-us/careers/us/privacy/
Создайте идеальное резюме с помощью ИИ-агента

Навыки
- Verilog
- SystemVerilog
- HLS
- RTL Design
- Microarchitecture
- Computer Architecture
- Memory Controller
- NoC
- Interconnect IP
- AI/ML Workloads
- PPA Optimization
- Hardware Debugging
Возможные вопросы на собеседовании
Проверка фундаментальных знаний в области иерархии памяти и пропускной способности.
Опишите основные проблемы проектирования контроллеров памяти для высокопроизводительных ИИ-ускорителей и способы их решения.
Оценка навыков оптимизации дизайна.
Какие методы вы используете для оптимизации PPA (Power, Performance, Area) при проектировании сложных путей данных в RTL?
Проверка опыта работы с современными методологиями проектирования.
Расскажите о вашем опыте использования HLS (High-Level Synthesis) в сравнении с традиционным написанием RTL на Verilog/SystemVerilog.
Оценка понимания системного уровня.
Как архитектура NoC (Network-on-Chip) влияет на масштабируемость систем для обучения больших языковых моделей (LLM)?
Проверка навыков отладки.
Опишите наиболее сложную проблему с аппаратной частью, которую вы диагностировали и исправили на этапе верификации или валидации.
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- Страна
- США
- Зарплата
- 138 000 $ – 206 000 $