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- Зарплата
- 135 000 $ – 195 000 $
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Sr. Signal and Power Integrity Engineer, Satellites (Starlink)
Исключительная возможность работать над одним из самых амбициозных технологических проектов в мире. Высокая зарплата, опционы и работа в Redmond (штаб-квартира Starlink) делают вакансию топовой для инженеров электроники.
Сложность вакансии
Высокая сложность обусловлена требованиями к глубоким знаниям в области электромагнитной теории, опыта работы с интерфейсами 112 Гбит/с и необходимостью соответствия правилам ITAR. Роль предполагает полную ответственность за SI/PI в критически важных системах спутниковой связи.
Анализ зарплаты
Предлагаемый диапазон $135k - $195k полностью соответствует рыночным стандартам для Senior-позиций в сфере аппаратного обеспечения в штате Вашингтон, при этом общий пакет компенсации значительно выше за счет акций SpaceX.
Сопроводительное письмо
I am writing to express my strong interest in the Senior Signal and Power Integrity Engineer position for the Starlink project. With extensive experience in high-speed digital design and a deep understanding of EM simulation tools like HFSS and ADS, I have successfully managed the full lifecycle of complex hardware products, from initial silicon architecture to final production debug. My background in optimizing PDNs for large ASICs and designing channels for 112Gbps+ SERDES aligns perfectly with the cutting-edge challenges your team is tackling.
SpaceX’s mission to revolutionize global connectivity through the Starlink constellation is incredibly inspiring. I am particularly drawn to this role because it sits at the intersection of multiple engineering disciplines, requiring the cross-functional collaboration I excel at. I am eager to bring my expertise in SI/PI methodology and my passion for high-performance hardware to help Starlink reach its full potential and support SpaceX’s broader goals for space exploration.
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Описание вакансии
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.
SR. SIGNAL AND POWER INTEGRITY ENGINEER, SATELLITES (STARLINK)
SpaceX is leveraging its experience in building rockets and spacecraft to deploy Starlink, the world’s most advanced broadband internet system. Starlink is the world’s largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We’ve only begun to scratch the surface of Starlink’s potential global impact. As we continue to upgrade and expand the constellation, we’re looking for best-in-class engineers to join the team.
As a Signal and Power Integrity Engineer on Starlink’s Payload Engineering team, you’ll have SI and PI ownership throughout the entire life-cycle of the portfolio of hardware that enables this connectivity, and sits at the intersection of electrical, mechanical, thermal analysis, software, and antenna/RF engineering. Early in any given product’s design cycle, your work will include everything from IP evaluation in the silicon architecture stage, package performance evaluation, stackup material selection and characterization, channel and PDN architecture, and PCB layout oversight. Once hardware is in hand, you will drive troubleshooting, characterization, qualification, and general debug across all phases of the product’s life.
As a subject matter expert on SI and PI, you will define the design, analysis, and verification processes and tools that the Starlink team uses when developing hardware. You will have wide latitude to determine how best to tackle these problems and be expected to spread the associated knowledge and techniques to engineers across the Starlink program.
RESPONSIBILITIES:
- Specify, design, simulate, verify, qualify, define production screens for, and generally troubleshoot SI and PI aspects of advanced satellite hardware, such as:
+ Wireline and electro-optical communication systems with cutting edge (e.g. 10 to 112+ Gbps) SERDES, DSPs, retimers, and optoelectronics
+ High-speed and high-bandwidth memory interfaces (DDR4, LPDDR5, GPDDR6, QSPI NOR, eMMC, etc.)
+ Power needs and PDNs for the associated ASICs
- Work alongside RF engineers, antenna engineers, ASIC engineers, packaging engineers, mechanical engineers, thermal engineers, software engineers, supply chain, and production engineers (among others) to architect new products which will employ novel channels, interfaces, and power delivery strategies
- Derive top level specifications for PCB materials and channel subcomponents
- Design and optimize transition structures for the entire channel from die bump to die bump
- Drive detailed component selection to accompany your PDN designs
- Root cause and fix issues found in PCB manufacturing, PCBA test, or satellite integration
- Define best practices, simulation workflows, test methodologies, signoff criteria, and lab equipment needs for all SI/PI needs on Starlink satellite payloads
BASIC QUALIFICATIONS:
- Bachelor’s degree in electrical engineering, computer engineering, or physics
- 5+ years of industry experience designing circuits, electronic products, or hardware
- 2+ years of experience using one of the 3D EM simulation tools and high-speed digital channel simulators (CST, HFSS, ADS etc.)
- 2+ years of research or industry experience with high-speed digital design or power integrity
PREFERRED SKILLS AND EXPERIENCE:
- Master’s degree or PhD in electrical engineering, computer engineering with emphasis in electromagnetic theory, transmission line theory, wireline transceivers, or power integrity
- 5+ years of electronic product experience designing hardware from concept through production; strong emphasis on full life-cycle development of new hardware products and not small incremental updates to legacy hardware
- 5+ years of experience architecting, implementing, and debugging cutting edge DSP based SERDES products (i.e. 56Gbps, 112Gbps, 224Gbps) working across package and PCB
- 5+ years of experience specifying, analyzing, debugging, and working with high speed, high bandwidth memory interfaces
- 5+ years of experience designing, implementing, and debugging power delivery networks for large processors, FPGAs, SoC, or ASICs with complex power requirements
- Thorough understanding of wireline transceiver concepts, architectures, and circuits
- Strong understanding of computers and programming languages (Python, C/C++)
- Demonstrated ability to work in a highly cross-functional role
- Experience with low loss laminates, high volume PCB manufacturing, and high-speed connectors
- Experience debugging and resolving EMI/EMC de-sense problems
- Passion for working in dynamic cross-functional role to optimize package, PCB, ASIC, mixed signal circuit to deliver best in class products
ADDITIONAL REQUIREMENTS:
- Ability to work extended hours or weekends as needed for mission critical deadlines
- Some travel may occasionally be required
COMPENSATION AND BENEFITS:
Pay range:
Signal & Power Integrity Engineer/Senior: $135,000 - $195,000/per year
Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.
Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short and long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation and will be eligible for 10 or more paid holidays per year. Employees in Washington State accrue paid sick time in compliance with state and federal law. Company shuttles are offered to employees for roundtrip travel from select Seattle locations to the SpaceX Redmond office Monday to Friday
ITAR REQUIREMENTS:
- To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.
SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Applicants wishing to view a copy of SpaceX’s Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to EEOCompliance@spacex.com.
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Навыки
- Signal Integrity
- Power Integrity
- CST Studio Suite
- ANSYS HFSS
- Advanced Design System (ADS)
- PCB Design
- Python
- C++
- SerDes
- DDR4
- LPDDR5
- Electromagnetic Theory
- EMI/EMC
Возможные вопросы на собеседовании
Проверка понимания физических процессов в высокоскоростных каналах.
Как вы подходите к минимизации перекрестных помех (crosstalk) и потерь в канале при проектировании интерфейсов 112 Гбит/с на печатных платах с высокой плотностью монтажа?
Оценка навыков проектирования сетей распределения питания.
Опишите ваш процесс проектирования и верификации PDN для мощных ASIC: как вы определяете целевой импеданс и выбираете стратегию размещения развязывающих конденсаторов?
Проверка владения специализированным ПО.
В каких случаях вы отдаете предпочтение 3D EM симуляторам (например, HFSS) перед 2D/2.5D экстракторами при анализе переходных отверстий (vias)?
Оценка навыков поиска и устранения неисправностей.
Расскажите о самом сложном случае дебага SI/PI в вашей практике: как вы локализовали проблему и какое решение внедрили?
Проверка умения работать в междисциплинарной команде.
Как вы находите баланс между требованиями SI/PI и ограничениями со стороны инженеров по механике и теплофизике при выборе материалов стека и компоновке платы?
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- Зарплата
- 135 000 $ – 195 000 $