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Principal Design Verification Engineer (Silicon Engineering)
Исключительная вакансия в одной из самых инновационных компаний мира с очень высокой зарплатой и уникальными задачами. Ограничивающим фактором является только требование к гражданству/резидентству США (ITAR).
Сложность вакансии
Высокая сложность обусловлена требованиями к опыту (10+ лет), необходимостью глубоких знаний UVM и спецификой работы с космическими технологиями. Также накладываются строгие законодательные ограничения ITAR.
Анализ зарплаты
Предлагаемая зарплата ($210k - $310k) находится на верхнем уровне рынка для Кремниевой долины, особенно учитывая дополнительные бонусы в виде акций SpaceX.
Сопроводительное письмо
I am writing to express my strong interest in the Principal Design Verification Engineer position at SpaceX. With over a decade of experience in digital ASIC and FPGA verification, I have a proven track record of leading complex verification environments from test plan development to post-silicon validation. My expertise in UVM and constrained random verification aligns perfectly with the rigorous standards required for the Starlink satellite constellation.
Throughout my career, I have successfully managed full-cycle verification for high-performance silicon projects, ensuring reliability in mission-critical environments. I am particularly drawn to SpaceX's mission of expanding global connectivity and the technical challenge of developing next-generation ASICs for space infrastructure. I am eager to bring my technical leadership and problem-solving skills to your world-class engineering team to help maximize Starlink’s global impact.
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Описание вакансии
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.
PRINCIPAL DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING)
At SpaceX we’re leveraging our experience in building rockets and spacecraft to deploy Starlink, the world’s most advanced broadband internet system. Starlink is the world’s largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We’ve only begun to scratch the surface of Starlink’s potential global impact are looking for best-in-class engineers to help maximize Starlink’s utility for communities and businesses around the globe.
We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.
RESPONSIBILITIES:
- Responsible for digital ASIC and/or FPGA verification at block and system level
- Lead and execute verification test plan, development, and milestones from beginning to end
- Contribute towards pre-silicon verification, chip bring-up and post-silicon validation
- Be a hands-on self-starter who can execute the steps required to fully verify a complex digital designs
BASIC QUALIFICATIONS:
- Bachelor’s degree in electrical engineering, computer engineering, or computer science
- 10+ years of experience with design verification and test bench development
- 10+ years of experience with design verification and test bench development
PREFERRED SKILLS AND EXPERIENCE:
- Advanced degree in electrical engineering or computer engineering
- Experience with verification methodologies such as UVM/OVM/VMM
- Strong object-oriented programming knowledge
- Strong problem-solving and coding skills
- Experience in constrained random verification
- Expertise in developing test plans, implementing coverage models, and analyzing results
- Experience with scripting languages, e.g. Python for automation
- RTL design, chip bring-up, and post-silicon validation experience
- Ability to work in a dynamic environment with changing needs and requirements
ADDITIONAL REQUIREMENTS:
- Ability to work extended hours and weekends as needed to meet critical milestones
COMPENSATION & BENEFITS:
Pay range:
Design Verification Engineer / Principal: $210,000.00 - $310,000.00/per year
Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.
Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation & will be eligible for 10 or more paid holidays per year. Exempt employees are eligible for 5 days of sick leave per year.
ITAR REQUIREMENTS:
- To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.
SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Applicants wishing to view a copy of SpaceX’s Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to EEOCompliance@spacex.com.
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Навыки
- UVM
- OVM
- VMM
- ASIC
- FPGA
- SystemVerilog
- Python
- RTL Design
- Constrained Random Verification
- Post-Silicon Validation
Возможные вопросы на собеседовании
Для позиции Principal важно понимать, как кандидат структурирует процесс верификации с нуля для сложных систем.
Опишите ваш подход к разработке комплексного плана верификации для нового ASIC: от определения метрик покрытия до финального подписания (sign-off).
UVM является стандартом в индустрии, и на этом уровне ожидается экспертное владение архитектурой тестового окружения.
С какими наиболее сложными проблемами в архитектуре UVM вы сталкивались и как вы оптимизировали производительность симуляции?
Роль предполагает работу на стыке этапов проектирования.
Расскажите о вашем опыте в post-silicon validation: как вы соотносите баги, найденные в реальном железе, с пре-кремниевыми моделями?
SpaceX ценит умение работать в быстро меняющейся среде.
Приведите пример, когда требования к дизайну изменились на поздних стадиях проекта. Как вы адаптировали стратегию верификации без потери качества?
Автоматизация критична для масштабируемых систем Starlink.
Как вы используете Python или другие скриптовые языки для автоматизации анализа регрессий и генерации тестовых сценариев?
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- Страна
- США
- Зарплата
- 210 000 $ – 310 000 $