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samsungsemiconductor
Страна
США
Зарплата
219 000 $ – 351 000 $
+500% приглашений

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LeadВ офисеПолная занятость

Principal Engineer, SOC Design

Оценка ИИ

Престижная позиция в Samsung с очень высокой зарплатой, отличным пакетом льгот и возможностью работать над передовыми технологиями памяти и ИИ.


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Сложность вакансии

ЛегкоСложно
Оценка ИИ

Чрезвычайно высокая сложность из-за требований к опыту (15-20+ лет) и необходимости глубоких знаний во всем цикле проектирования ASIC, включая сложные интерфейсы (UCIe, DDR) и архитектуру ARM.

Анализ зарплаты

Медиана285 000 $
Рынок210 000 $ – 380 000 $
Оценка ИИ

Предложенный диапазон $219k–$351k полностью соответствует рыночным ставкам для позиций уровня Principal Engineer в Кремниевой долине, где медиана для высококвалифицированных разработчиков чипов составляет около $280k-300k без учета бонусов.

Сопроводительное письмо

I am writing to express my strong interest in the Principal Engineer, SOC Design position at Samsung Semiconductor's DRAM Development Lab. With over 20 years of experience in ASIC design and a proven track record of taking complex silicon solutions from architectural definition to tape-out, I am confident in my ability to contribute to your team's mission of solving Cloud and Data Center challenges. My expertise in integrating high-performance IPs such as ARM cores, UCIe, and DDR controllers aligns perfectly with the requirements of this role.

Throughout my career, I have developed a deep understanding of PPA trade-offs and have successfully led micro-architecture development for large-scale subsystems. I am particularly drawn to Samsung's focus on emerging machine learning applications and edge computing. I look forward to the possibility of bringing my technical leadership and collaborative problem-solving skills to your innovative R&D environment in San Jose.

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Составьте идеальное письмо к вакансии с ИИ-агентом

Составьте идеальное письмо к вакансии с ИИ-агентом

Откликнитесь в samsungsemiconductor уже сейчас

Присоединяйтесь к лидеру индустрии DRAM и создавайте будущее вычислительных систем в Samsung Semiconductor!

Описание вакансии

Please Note:

To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.

Advancing the World’s Technology Together

Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future.

We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.

Principal Engineer, SOC Design

What You’ll Do

The DRAM Development Lab (DDL) is part of Samsung’s Memory Business Unit, the industry's technology and volume leader in DRAM, HBM and NAND Flash.  DDL’s vision is to solve key problems of Cloud & Data center by developing the new technology for memory and storage. The SOC team within DDL focuses on the development of silicon solutions. We are an integral part of Samsung’s strong R&D focus & lab innovation engine. We work closely with development teams to bring feature innovation to product roadmaps.

Come join the team that is creating new computing system architectures needed to support emerging machine learning applications, data analytics and edge computing. You’ll focus on enhancement of memory and storage capability by developing prototype and production controllers.

Job ID:  42866

Location: Daily onsite presence at our San Jose or Folsom office in alignment with our Flexible Work policy

  • Participate in architectural definitions and responsible for micro architecture of subsystem and/or chip level.
  • Responsible for top integration, logic design and RTL implementation along with quality check (Assertion, Lint, CDC, and STA).
  • Reviews 3rd party IPs including ARM cores, DDR controller, and UCIe PHY
  • Responsible for integrating the third part IPs and sub system at top level
  • Work closely with architects and verification engineers to ensure sound design at SoC level.
  • Work with physical designers on timing constraints, synthesis, DFT insertion, and static timing analysis

What You Bring

  • Bachelors in Electrical, Computer Science or related with 20+ years of experience or Masters in Electrical, Computer Science or related Science with 18+ years of Industry Experience or PhD in Electrical, Computer Science or related Science with 15+ years of Industry experience preferred.
  • Highly motivated with good verbal and written communication skills.
  • Hands on knowledge & experience in ASIC design flow from design to tape out.
  • Experience & Good knowledge in ATE vector generation, testing and silicon bring up.
  • Experience in the commercial IPs such as UCIe, CPU, Ethernet, and DDR interfaces.
  • Good understanding of PPA (performance, power, and area) trade-offs.
  • Experience in SoC level synthesis, timing analysis, lint check, CDC checks.
  • Experience in interfacing 3rd party service companies for DFT/PI/PD.
  • Good knowledge and experience in AMBA bus fabric, ARM cores.
  • Self-motivated problem-solver with an ability to work well in a team.
  • You’re inclusive, adapting your style to the situation and diverse global norms of our people.
  • An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
  • You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
  • Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-SF1

What We OfferThe pay range below is for all roles at this level across all US locations and functions. Pay within this range varies by work location and may also depend on job-related knowledge, skills, and experience. We also offer incentive opportunities that reward employees based on individual and company performance. 

This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours.

Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.

Enjoy Time Away You’ll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.

Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.

Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you’ll have support no matter where you are.

Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier.

Embrace Flexibility Benefits are best when you have the space to use them. That’s why we facilitate a flexible environment so you can find the right balance for you.

Base Pay Range

$219,000—$351,000 USD

Equal Opportunity Employment Policy

Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status.

When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations.

Recruiting Agency Policy

We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings.

Applicant AI Use Policy

At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate’s genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process.

Applicant Privacy Policy

https://semiconductor.samsung.com/about-us/careers/us/privacy/

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Создайте идеальное резюме с помощью ИИ-агента

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Навыки

  • ASIC
  • SoC
  • RTL
  • ARM
  • DDR
  • UCIe
  • Static Timing Analysis
  • Synthesis
  • DFT
  • AMBA
  • Lint
  • CDC
  • Verilog
  • SystemVerilog

Возможные вопросы на собеседовании

Проверка опыта работы с современными высокоскоростными интерфейсами, упомянутыми в описании.

Расскажите о вашем опыте интеграции UCIe PHY и с какими основными трудностями вы сталкивались при обеспечении целостности данных?

Оценка навыков оптимизации, критически важных для Principal уровня.

Как вы подходите к балансировке PPA (производительность, мощность, площадь) при проектировании контроллеров памяти для дата-центров?

Проверка владения полным циклом разработки.

Опишите ваш опыт взаимодействия с командами физического проектирования (PD) для решения проблем сходимости таймингов на этапе синтеза.

Оценка лидерских качеств и архитектурного мышления.

Каким был самый сложный архитектурный компромисс, который вам пришлось принять в недавнем проекте SoC, и как это повлияло на итоговый продукт?

Проверка навыков отладки и вывода продукта на рынок.

Расскажите о вашем опыте silicon bring-up: какие критические ошибки вы находили на этапе тестирования чипа и как их устраняли?

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samsungsemiconductor
Страна
США
Зарплата
219 000 $ – 351 000 $